1. Field of the Invention
The present invention relates to video graphics processing.
2. Background Information
Computers are used in many representational and interactive applications. As computing systems continue to evolve, their graphical display requirements become more stringent. These requirements are especially demanding in the field of three-dimensional (3D) video graphics processing.
In 3D graphics rendering, an image of a 3D rendering space is presented on a display frame as if the space is being viewed through a two-dimensional display plane. As shown in FIG. 1, the display frame 10 is an array of individual picture elements (or ‘pixels’) 30. For efficiency in processing and/or storage, display frame 10 may be divided into pixel blocks 20. For consumer applications, typical sizes for a display frame include 640×480, 800×600, 1024×768, 1152×864, 1280×1024, and 1600×1200 pixels.
Each pixel represents a sample of the display plane at a specified location and may include one or more pixel values, such as a color value that corresponds to the color of the rendering space as viewed through the display plane at that location, an opacity value (also called an alpha value), and a depth value (also called a Z value, where the display plane is defined as a particular X-Y plane in an XYZ coordinate space). A color value of a pixel may further include multiple subvalues: for example, red, green, and blue values in a RGB colorspace; or hue, saturation, and intensity values in a HSV colorspace.
In a 3D surface rendering scheme, three-dimensional ‘wire frame’ models of objects in the rendering space are constructed using graphics primitives (e.g. triangles or other elemental polygons). Each primitive is defined by a set of vertices that have values relating to location (e.g. in the rendering space), quality (e.g. color, opacity, and/or texture), and/or lighting (e.g. direction of surface normal).
A 3D graphics architecture receives the vertices (e.g. from a software application) and converts them to fragments, whose color values are accumulated into a frame buffer that represents the display frame. Computer displays and other high-resolution display devices, such as high-definition televisions (HDTVs), projectors, printers, and the like, present the contents of the frame buffer to a viewer. The pixels are closely spaced, and the viewer's visual system performs a filtering of the individual pixels to form a composite image. If an image is properly partitioned into pixels that are sufficiently close together, the viewer perceives the displayed array as a virtually continuous image.
Depth information is important to the 3D rendering process, as an object that is entirely opaque will occlude those portions of other objects that lie behind it with respect to the viewpoint. As the positions of the vertices with respect to the display plane include the spatial dimension of depth within the rendering space (also referred to as the Z-dimension), objects may be drawn in front of or behind one another in overlapping (or occluding) fashion.
In order to correctly render an object model, each fragment should be tested for occlusion before its values are incorporated into a corresponding pixel. To support occlusion testing, a 3D graphics architecture includes a Z buffer that holds the Z values of the pixels of the image in the frame buffer. If the Z value of a fragment indicates that the fragment is occluded by an existing opaque surface in the image, then the fragment will not be visible and the corresponding pixel should not be updated in the frame buffer.
Considerable memory bandwidth is consumed in retrieving and updating Z buffer values. Memory traffic due to Z buffer use may be reduced by caching Z values locally (e.g. as described in U.S. Pat. No. 6,421,764). Additionally, upon a cache miss, the backmost Z value among a cache line block marked for replacement may be selected as a representative Z value for the block and stored into a representative Z value memory (or ‘hierarchical Z buffer’). Implementation of a representative Z value memory, and use of such a memory for object-element level processing determinations, are described in U.S. Pat. No. 6,492,987.
It is desirable to maintain a representative Z value memory close to the graphics processing hardware, even on the same chip if possible. Although the size of this memory is reduced in comparison with the Z buffer, it may still be quite large, consuming a significant amount of chip area and thus reducing the area available for processing elements and/or increasing fabrication costs by requiring an increased die size.